An Area-Efficient and Low-Latency ASIC Design of Deflate Data Compressor for SSD Applications
Release Time:2025-12-11
Hits:
- Title of Paper:
- An Area-Efficient and Low-Latency ASIC Design of Deflate Data Compressor for SSD Applications
- Journal:
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Translation or Not:
- No
- Date of Publication:
- 2025-12
- Included Journals:
- SCI
- Release Time:
- 2025-12-11