Title : Design and Verification of NVM Control Architecture Based on High-Performance SOC FPGA Array 基于高性能SOC FPGA阵列的NVM验证架构设计与验证

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Affiliation of Author(s):计算机科学与技术学院

Title of Paper:Design and Verification of NVM Control Architecture Based on High-Performance SOC FPGA Array 基于高性能SOC FPGA阵列的NVM验证架构设计与验证

Journal:《计算机研究与发展》

Key Words:FPGA array;Hybrid memory;Memory controller;Non-volatile memory (NVM);SOC FPGA

First Author:LiuKe

Document Code:1403164815496581122

Volume:55

Issue:2

Page Number:265-272

Number of Words:5

Translation or Not:no

Date of Publication:2018-02-01