|
个人信息Personal Information
教授 硕士生导师
主要任职：Assistant Professor
性别：女
在职信息：在职
所在单位：计算机科学与技术学院
入职时间：2015-10-23
办公地点：Room 420, N3 Building, Qingdao Campus, Shandong University
扫描关注
- [81] 赵梦莹 and 赵梦莹. Software Assisted Non-volatile Register Reduction for Energy Harvesting Based Cyber-Physical System. 2015.
- [82] 赵梦莹 and 赵梦莹. Wear Relief for High-Density Phase Change Memory Through Cell Morphing Considering Process Variation . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34, 227, 2015.
- [83] 孙宇清 , 赵梦莹 , 李新 and 李新. Energy Optimization for Multi-Level Cell STT-MRAM Using State Remapping. 546, 2016.
- [84] 赵梦莹 and 赵梦莹. Joint Profit and Process Variation Aware High Level Synthesis with Speed Binning. IEEE Transactions on Very Large Scale Integration (VLSI) System, 2015.
- [85] 赵梦莹 and 赵梦莹. WUCC: Joint WCET and Update Conscious Compilation for cyber-physical systems. 2013.
- [86] 赵梦莹 and 贾智平. Multipath Load Balancing in SDN/OSPF Hybrid Network. IFIP International Conference on Network and Parallel Computing, 2016.
- [87] 鞠雷 , 赵梦莹 , 贾智平 and 蔡晓军. Shared Last-level Cache Management for GPGPUs with Hybrid Main Memory. Design, Automation & Test in Europe Conference, 2016.
- [88] 孙宇清 , 赵梦莹 and 李新. Energy Optimization for Multi-Level Cell STT-MRAM Using State Remapping. IEEE International Conference on High Performance Computing and Communications(HPCC), 546, 2016.
- [89] 赵梦莹 , 鞠雷 , 贾智平 and 宋维宁. EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors. IEEE Transactions on Computers, 68, 498, 2019.
- [90] 鞠雷 , 赵梦莹 , 贾智平 and 蔡晓军. Shared Last-level Cache Management for GPGPUs with Hybrid Main Memory. Design, Automation & Test in Europe Conference, 2016.
- [91] 蔡晓军 , 鞠雷 , 赵梦莹 , 贾智平 and 王冠. Shared Last-level Cache Management for GPGPUs with Hybrid Main Memory. PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 25, 2017.
- [92] 张志勇 , 贾智平 , 鞠雷 , 赵梦莹 and 丁宪忠. Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance. ACM SIGPLAN NOTICES, 52, 91, 2017.
- [93] 张志勇 , 赵梦莹 and 贾智平. H2-RAID: a novel Hybrid RAID architecture towards High reliability. 2018.
- [94] 鞠雷 , 赵梦莹 , 蔡晓军 , 贾智平 and 王冠. Shared Last-level Cache Management and Memory Scheduling for GPGPUs with Hybrid Main Memory. ACM Transactions on Embedded Computing Systems, 2018.
- [95] 赵梦莹 , 贾智平 and 鞠雷. NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.
- [96] 张志勇 , 赵梦莹 , 贾智平 , 刘珂 and 蔡晓军. 基于高性能SOC FPGA阵列的NVM验证架构设计与验证. 计算机研究与发展, 2018.
- [97] 鞠雷 , 赵梦莹 , 贾智平 and 巩凡. Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture. PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017.
- [98] 鞠雷 , 赵梦莹 , 贾智平 and 蔡晓军. A Novel Page Caching Policy for PCM and DRAM of Hybrid Memory Architecture. The 2016 International Conference on Embedded Software and Systems (ICESS2016), 2016.
- [99] 孙宇清 , 赵梦莹 and 李新. Energy Optimization for Multi-Level Cell STT-MRAM Using State Remapping. IEEE International Conference on High Performance Computing and Communications(HPCC), 546, 2016.
- [100] 赵梦莹 and 贾智平. Multipath Load Balancing in SDN/OSPF Hybrid Network. IFIP International Conference on Network and Parallel Computing, 2016.