周梓梦
Associate Professor
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基于 FPGA 的物联网边缘节点目标检测关键技术研究
  • Affiliation of Participant(s):
    计算机科学与技术学院
  • Leading Scientist:
    赵梦莹
  • Nature of Project:
    纵向
  • Project level:
    省、部委级
  • Project Number:
    C3CB24406D613FD7E053BE07C2CA2574
  • Date of Project Approval:
    2020-12-16
  • Scheduled completion time:
    2022-12-31
  • Date of Project Completion:
    2022-12-31
  • Date of Project Initiation:
    2021-01-01
  • Project Approval Number:
    ZR2020ZH001

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