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个人信息Personal Information
教授 硕士生导师
主要任职:Assistant Professor
性别:女
在职信息:在职
所在单位:计算机科学与技术学院
入职时间:2015-10-23
办公地点:Room 420, N3 Building, Qingdao Campus, Shandong University
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- [21] 张浩. Pearl: Performance-Aware Wear Leveling for Nonvolatile FPGAs. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 40, 274, 2021.
- [22] 申兆岩. PattPIM: A Practical ReRAM-Based DNN Accelerator by Reusing Weight Pattern Repetitions. 2020.
- [23] 范玮. Q-learning Based Backup for Energy Harvesting Powered Embedded Systems. 2020.
- [24] 宋维宁. A lightweight online backup manager for energy harvesting powered. Journal of Systems Architecture(CCF-B), 2020.
- [25] 王慧宇. CLOCK-RWRF: A Read-Write-Relative-Frequency Page Replacement Algorithm for PCM and DRAM of Hybrid Memory. HPCC 2020(会议论文,CCF-C), 2020.
- [26] 刘珂. Applying Multiple Level Cell to Non-volatile FPGAs. ACM Transactions on Embedded Computing Systems, 19, 2020.
- [27] 刘珂. Dynamically Reconfigurable Architecture for High-Throughput Hash Function in Key-Value Store.. 2019.
- [28] 王倩. A Highly Parallelized PIM-Based Accelerator for Transaction-Based Blockchain in IoT Environment. IEEE Internet of Things Journal, 7, 4072, 2020.
- [29] 王倩. A Highly Parallelized PIM-based Accelerator for Transaction-based Blockchain in IOT Environment.. Internet of Things Journal, 2019.
- [30] 赵梦莹 , 蔡晓军 , 贾智平 and 槐硕. Performance-aware Wear Leveling for Block RAM in Nonvolatile FPGAs. 2019.
- [31] 赵梦莹 and Li, Fuyang. Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 38, 15, 2019.
- [32] 鞠雷 , 赵梦莹 and 贾智平. Write-back aware shared last-level cache management for hybrid main memory. Design Automation Conference, 2016.
- [33] 鞠雷 , 戴鸿君 , 李新 , 赵梦莹 , 贾智平 and 李兆颖. Set Variation-aware Shared LLC Management for CPU-GPU Heterogeneous Architecture. PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 79, 2018.
- [34] 蔡晓军 , 张志勇 , 赵梦莹 , 贾智平 and 刘珂. 基于高性能SOC FPGA阵列的NVM验证架构设计与验证. 计算机研究与发展, 2018.
- [35] 赵梦莹 , 鞠雷 , 贾智平 and 宋维宁. EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors. IEEE Transactions on Computers, 68, 498, 2019.
- [36] 鞠雷 , 赵梦莹 and 贾智平. NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.
- [37] 贾智平 , 张志勇 and 赵梦莹. H2-RAID: a novel Hybrid RAID architecture towards High reliability. 2018.
- [38] 鞠雷 , 赵梦莹 , 蔡晓军 , 贾智平 and 王冠. Shared Last-level Cache Management and Memory Scheduling for GPGPUs with Hybrid Main Memory. ACM Transactions on Embedded Computing Systems, 2018.
- [39] 赵梦莹 , 鞠雷 , 贾智平 and 李静. Maximizing Forward Progress with Cache-aware Backup for Self-powered Non-volatile Processors. PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017.
- [40] 鞠雷 , 赵梦莹 , 贾智平 and 巩凡. Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture. PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017.