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个人信息Personal Information
教授 硕士生导师
主要任职：Assistant Professor
性别：女
在职信息：在职
所在单位：计算机科学与技术学院
入职时间：2015-10-23
办公地点：Room 420, N3 Building, Qingdao Campus, Shandong University
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- [101] 赵梦莹. Retention Trimming for Wear Reduction of Flash Memory Storage Systems. The 51st Annual Design Automation Conference on Design Automation Conference (DAC), 2014.
- [102] 赵梦莹. Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache. roceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES), 2012.
- [103] 赵梦莹. WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture. Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES), 2012.
- [104] 赵梦莹. Branch Prediction directed Dynamic instruction Cache Locking for embedded systems. IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications(RTCSA), 2013.
- [105] 赵梦莹. Data re-allocation enabled cache locking for embedded systems. IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC), 2013.
- [106] 赵梦莹. WUCC: Joint WCET and Update Conscious Compilation for cyber-physical systems. Asia and South Pacific Design Automation Conference (ASPDAC), 2013.
- [107] 赵梦莹. Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor. Design Automation Conference, 2015.
- [108] 赵梦莹. Migration-aware loop retiming for STT-RAM based hybrid cache for embedded systems. EEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2013.
- [109] 赵梦莹. Compiler Directed Automatic Stack Trimming for Efficient Non-Volatile Processors. Design Automation Conference, 2015.
- [110] 赵梦莹. Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. Proceedings of the 2014 international symposium on Low power electronics and design (ISLPED), 2014.
- [111] 赵梦莹. Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems. IEEE Transactions on Very Large Scale Integration (VLSI) System, 2014.
- [112] 赵梦莹. Error Model Guided Joint Performance and Endurance Optimization for Flash Memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014.
- [113] 赵梦莹. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory based Storage Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015.
- [114] 赵梦莹. Migration-aware Loop Retiming for STT-RAM based Hybrid Cache in Embedded Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014.
- [115] 赵梦莹. Branch Prediction Directed Dynamic Instruction Cache Locking for Embedded Systems. ACM Transactions on Embedded Computing Systems, 2014.
- [116] 赵梦莹. Joint WCET and Update Activity Minimization for Cyber-physical Systems. ACM Transactions on Embedded Computing Systems, 2015.
- [117] 赵梦莹. Leveling to the Last Mile: Near-zero-cost Bit Level Wear Leveling for PCM based Main Memory. IEEE International Conference on Computer Design (ICCD), 2014.
- [118] 赵梦莹. Profit maximization through process variation aware high level synthesis with speed binning. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013.
- [119] 赵梦莹. Online OLED dynamic voltage scaling for video streaming applications on mobile devices. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2013.
- [120] 赵梦莹. SLC-enabled Wear Leveling for MLC PCM Considering Process Variation. The 51st Annual Design Automation Conference on Design Automation Conference (DAC), 2014.