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个人信息Personal Information
教授 硕士生导师
主要任职：Assistant Professor
性别：女
在职信息：在职
所在单位：计算机科学与技术学院
入职时间：2015-10-23
办公地点：Room 420, N3 Building, Qingdao Campus, Shandong University
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- [61] 赵梦莹. Migration-aware loop retiming for STT-RAM based hybrid cache for embedded systems. EEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2013.
- [62] 赵梦莹. Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. Proceedings of the 2014 international symposium on Low power electronics and design (ISLPED), 2014.
- [63] 赵梦莹. Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor. Design Automation Conference, 2015.
- [64] 赵梦莹. Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems. IEEE Transactions on Very Large Scale Integration (VLSI) System, 2014.
- [65] 赵梦莹. Error Model Guided Joint Performance and Endurance Optimization for Flash Memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014.
- [66] 赵梦莹. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory based Storage Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015.
- [67] 赵梦莹. Branch Prediction Directed Dynamic Instruction Cache Locking for Embedded Systems. ACM Transactions on Embedded Computing Systems, 2014.
- [68] 赵梦莹. Joint WCET and Update Activity Minimization for Cyber-physical Systems. ACM Transactions on Embedded Computing Systems, 2015.
- [69] 赵梦莹. Online OLED dynamic voltage scaling for video streaming applications on mobile devices. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2013.
- [70] 赵梦莹. Leveling to the Last Mile: Near-zero-cost Bit Level Wear Leveling for PCM based Main Memory. IEEE International Conference on Computer Design (ICCD), 2014.
- [71] 赵梦莹. SLC-enabled Wear Leveling for MLC PCM Considering Process Variation. The 51st Annual Design Automation Conference on Design Automation Conference (DAC), 2014.
- [72] 赵梦莹. Minimizing MLC PCM Write Energy for Free through Profiling-based State Remapping. The 20th Asia and South Pacific Design Automation Conference (ASPDAC), 2015.
- [73] 赵梦莹. Branch Prediction directed Dynamic instruction Cache Locking for embedded systems. IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications(RTCSA), 2013.
- [74] 赵梦莹. Software Assisted Non-volatile Register Reduction for Energy Harvesting Based Cyber-Physical System. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015.
- [75] 赵梦莹. Wear Relief for High-Density Phase Change Memory Through Cell Morphing Considering Process Variation . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34, 227, 2015.
- [76] 李新 , 孙宇清 and 赵梦莹. Energy Optimization for Multi-Level Cell STT-MRAM Using State Remapping. IEEE International Conference on High Performance Computing and Communications(HPCC), 546, 2016.
- [77] 赵梦莹. Joint Profit and Process Variation Aware High Level Synthesis with Speed Binning. IEEE Transactions on Very Large Scale Integration (VLSI) System, 2015.
- [78] 赵梦莹. WUCC: Joint WCET and Update Conscious Compilation for cyber-physical systems. Asia and South Pacific Design Automation Conference (ASPDAC), 2013.
- [79] 赵梦莹 and 贾智平. Multipath Load Balancing in SDN/OSPF Hybrid Network. IFIP International Conference on Network and Parallel Computing, 2016.
- [80] 鞠雷 , 赵梦莹 , 贾智平 and 蔡晓军. Shared Last-level Cache Management for GPGPUs with Hybrid Main Memory. Design, Automation & Test in Europe Conference, 2016.